The chips to be produced based on the new process are primarily designed for high performance computing with low energy consumption. In the future, it is planned to use them in mobile processors.

what is known

• The new technology uses a media-gate transistor architecture that Samsung calls the Multi-Bridge-Channel FET (MBCFET).
• Wider electrical channels in the gates lower the voltage level compared to previous FinFET transistor architectures.
• The channels are surrounded by gates on all four sides, which allows more current to pass through the gates than FinFETs.
• Compared to the 5 nanometer process, this reduces energy consumption by 45 percent and increases productivity by 23 percent. At the same time, the surface area decreased by 16 percent.
• Samsung also claims that the 3-nanometer process provides a more flexible design where it is possible to adjust the channel width to the customer’s requirements.
• The company said that the second generation of the 3-nanometer technological process with increased energy efficiency, productivity and surface area is already in the works.

Samsung’s main competitor, Taiwanese semiconductor manufacturer TSMC, is also preparing to start producing 3-nanometer products in the second half of 2022. Samsung passed TSMC and Can win more orders from big customers like Qualcomm. The company did not specify for which customer it began mass production of the new chips.