The company TSMC presented a SOT-MRAM memory jointly developed together with scientists from the Taiwan Industrial Technology Institute (ITRI). The new device is designed to be used as in-memory computing and high-level cache. The new memory is faster than DRAM and retains data even after power off, and is designed to replace STT-MRAM memory by consuming 100 times less energy during operation.

The role of high-level caches (L3 and above) and for in-memory computations has long been claimed by magnetoresistive memory with spin-momentum transfer register (STT-MRAM), among other promising options for non-volatile memory. . This memory variant transferred the magnetization of the memory cell through a tunnel junction using a spin-polarized current. Thus, it turns out that the energy consumption of STT-MRAM is many times less than the consumption of ordinary MRAM memory, in which recording is carried out by the induced electromagnetic field.

SOT-MRAM goes further. Registration (magnetization) of the cell (ferromagnetic layer) occurs with the help of the spinorbital rotation moment. The effect manifests itself in the conductor at the base of the cell in the process of combining two phenomena: the spin Hall effect and the Rashba-Edelstein effect. As a result, the ferromagnet adjacent to the conductor is affected by the magnetic field induced from the side of the spin current in the conductor. This results in SOT-MRAM requiring less power to operate, but real breakthroughs are yet to come.

Write and read valid paths for two types of MRAM cells. Image source: National University of Singapore

Other advantages of SOT-MRAM memory are increased resistance to wear, as well as separate write and read schemes, which positively affects performance.

“This basic cell achieves speeds of up to 10 ns, providing simultaneously low power consumption and high-speed operation, said Dr. General Manager of ITRI Electronics and Optoelectronic Systems Research Laboratories. Shi-Chi Chang. — Overall computing performance can be further improved when in-memory computing circuitry is implemented. “Looking ahead, this technology has application potential in high-performance computing (HPC), artificial intelligence (AI), automotive chips, and many more.”

SOT-MRAM memory with a latency of 10 ns appears to be closer to SRAM (latency up to 2 ns) than conventional DRAM memory with a latency of 100 ns and above. And of course, it is significantly faster than today’s popular 3D NAND TLC, with latencies from 50 to 100 μs. But SOT-MRAM memory in processors and controllers will not appear tomorrow or the day after tomorrow, because the same STT-MRAM memory that has been developed for more than 20 years is not in demand. Although often necessary for efficient in-memory computing and self-powered devices, that’s the future, and it’s not far off.