The present and future of PCI Express, the most important computer bus
January 24, 2024
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PCI Express is the basic standard of modern computers. Local entry/exit bus and which is used for the internal connection of integrated circuits of motherboards (chipsets), communication with
PCI Express is the basic standard of modern computers. Local entry/exit bus and which is used for the internal connection of integrated circuits of motherboards (chipsets), communication with the CPU and also for the installation of such important components as graphics cards, SSD or dedicated network or sound solutions.
The history of PCI Express is based on the technology industry’s need to have a high performance and unique bus which could replace those used in the computer architecture of several decades ago, from ISA to AGP, as well as the original PCI. In this way, PCI-SIG, the responsible group that includes more than 700 major companies, created a standard that achieved its main goal of improving performance and replacing older interfaces such as SATA for storage, in addition to saving costs and complexity in design. modern computers.
In fact, much of the architecture of current computers is based on a standard that you will see abbreviated as “PCIe” or “PCI-E” and to which we will dedicate this guide today, reminding you of everything I need to know about it, its present and what is to come.
PCI Express version
The original version was based on the existing PCI, but with a fundamental change: its structure as point-to-point, full-duplex lanes, working in series. From a practical point of view, which is better understood, each individual PCIe port and its installed cards can get maximum performance from the bus, compared to the much slower PCI, which tended to become congested when computers were connected with multiple connectors.
Once the main foundations were laid, the main focus from then on was to increase bandwidth to improve performance and launch PCI Express 3.0 In 2010, before and after was the norm. A huge improvement over the original PCI 1.0 by quadrupling the transfer speed up to 8 GT/s; its total bandwidth up to 126 Gbit/s (15.8 GB/s) and bandwidth per lane up to 15.8 Gbit/s (1969.2 MB/s).
As the industry’s needs continue to evolve, particularly in the graphics market and other bandwidth-intensive applications, PCI-SIG has continued to release versions to increase performance, reduce latency, offer superior capabilities in RAS, and improve I/ O. virtualization. Currently, it is the most widespread version PCIe 4.0a standard that increased the number of channels a signal passes through to double the bandwidth to 16 Gigatransfers per second.
More have arrived recently PCIe 5.0, another major advance over previous versions of the standard with a substantial increase in performance, using a frequency of 32 GHz up to a bandwidth of 128 GB/s in full-duplex mode, which is double that of PCI Express 4.0 and, conversely, four times that of PCI Express 3.0. . Adoption of this generation is lukewarm so far, with only the latest processor platforms from Intel and AMD supporting it. In addition, there are still major components such as graphics cards that have not yet made the leap to this Gen5. Its capabilities are also not used by hard disk manufacturers.
PCIe 6.0 is on the way
The PCI-SIG is always way ahead of the industry because any revision of the standard takes a long time to reach the end customer and is actually well overdue. The main improvement will again be a substantial increase in performance until reaching a bandwidth256 GB/s in full duplex, doubling PCI Express 5.0 and vice versa four times compared to PCI Express 4.0. This is achieved by doubling the data rate of a PCIe lane, increasing the speed to 8 GB/s in each direction and much more for multi-lane configurations.
With a frequency of 64 Ghz, it will be able to offer up to 64 Giga transmissions per second. The new PCIe 6 interface changes the encoding scheme to PAM4 to increase transfer rates. This is what really allows the spec to achieve such a large bandwidth. Technically, it modulates signals at four levels, packing two bits of information into a serial channel at the same time. This PAM4 scheme is widely used in higher performance networks such as Enterprise InfiniBand and we’ve also seen it in GDDR6 graphics memory.
Another of the changes expected in this version will affect reducing the physical size of the bus. A long-delayed innovation that must solve the monstrous size of some components that fit into PCIe slots, such as graphics cards. This is understandable if more efficient cooling systems are achieved, as this has not been possible until now.
PCIe 7.0 seeks the speed of light
PCI-SIG has announced a big news for this version, which we will surely not see commercially for the next decade. And that’s it the standard will work on optical links, the biggest advance since the creation of the standard. The group formed a working group to develop the version independently of others. In the future, Gen7 will support a wide range of optical technologies to further improve the standard’s capabilities in terms of performance, power consumption, range and latency.
Bandwidth per lane (x1) is said to be 128 GT/s, which means that at x16, like that used by graphics cards, the theoretical two-way performance can rise to approx. a stratospheric 512 GB/s. The group will first focus on professional technologies such as quantum computing, cloud and hyperscale data centers, followed by high-performance computing at the client level.
PCI Express types
PCIe has gone through several revisions, as you may have read, but they all have a common denominator: they use the same physical connections that you’ll see in the four primary sizes called x1, x4, x8 and x16. x32 ports also exist, but they are extremely rare and you don’t usually see them on consumer hardware.
Different physical sizes allow you to move varying amounts of simultaneous connections and data to the motherboard. The larger the port, the larger its maximum capacity. These connections are colloquially known as “lanes” or “lanes”, where each PCI-E lane is made up of two signaling pairs, one for sending data and one for receiving. In practice, more lanes allow for higher performance and capacity, and data will be able to flow faster between the peripheral and the rest of the computer system.
Not all devices need the same capacity, and while there are no established guidelines on what type of slot to use, we can point out some practical examples of use. For a common sound card or Wi-Fi, PCI-E x1 is enough, while high-end network cards, RAID controllers or USB 3 expanders use x4 or x8. Graphics cards typically use x16 for maximum throughput. SSDs in M.2 format for PCIe usually connect to x4 ports, but all indications are that they will be too small in the next generations.
It should be considered for practical purposes.
One technical part of PCI-Express that confuses the average consumer is that a x16-sized port may not offer the maximum number of lanes allowed by the standard. The explanation is that while PCIe can accommodate an unlimited number of individual connections, there is a practical limit to the performance of a board’s chipset.
This leads us to a conclusion you’re sure to know: not all motherboards are created equal. The economy series may have x16 slots, but whose performance is equivalent to, for example, x8. High-end PC boards intended for gaming or professional workstations usually have several x16 slots, which, in addition to their size, make the most of the performance and bandwidth allowed by the standard.
If you put a high-end graphics card in a slot that – even if it is x16 in size – does not offer the maximum number of lines, you may have a problem and you will not get its maximum performance. Another aspect to consider is that many boards with 2 x 16 slots only offer the maximum number of lines if you use one of them, dropping to x8 if you use both together. Comment that smaller x1 and x4 cards can be installed in x8 and x16 (obviously not the other way around). Additionally, some x8s have a different set of pins and cannot be installed in x16 slots.
Although the performance improvements that come with each release are appreciated, it would not be amiss to review these types of rails that may confuse consumers. And the same slot sizes we talked about above. It’s a very technical topic, but we hope that everything related to PCI Express, the most important (and almost the only) local Input/Output bus in modern computers, is a little clearer to you.
Donald Salinas is an experienced automobile journalist and writer for Div Bracket. He brings his readers the latest news and developments from the world of automobiles, offering a unique and knowledgeable perspective on the latest trends and innovations in the automotive industry.