It is an open secret, AMD is preparing to launch a hybrid architecture based on Zen 4, which will be based on a similar approach that we saw in Alder Lake-S and later in Raptor Lake-S. This means that the specified architecture will be accepted configuration of high performance cores and high efficiency coresboth capable of working simultaneously and designed to optimally deal with different tasks.

While this Zen 4-based AMD hybrid architecture builds on the same foundation, the execution is different, and it’s important to keep that in mind because it will ultimately create both designs. position in a different way although it has the same starting point.

As our regular readers may already know, both Alder Lake and Raptor Lake use a high performance core block based on the Golden Cove and Raptor Cove architectures, respectively, and a block of high-performance cores based on the Gracemont architecture.

Each of those basic blocks has important differences at all levels: silicon-level core size, operating frequency, cache subsystem and total count, specialized hardware, and much more. Therefore, the difference in performance when running tasks on one or the other block of cores can be huge. Intel uses two completely different architectures.

AMD will use Zen 4 in its new hybrid architecture

Unlike the chip giant, which, as we said before, uses two completely different architectures, AMD is going to use Zen 4 on both high performance cores and high efficiency cores. This may sound like bad news, but nothing could be further from the truth. Zen 4 is a highly scalable architecture, and using a modified version to create high-performance cores is quite a wise decision.

I know you might be wondering how AMD will extend the Zen 4 architecture in this new hybrid design and the answer is very simple, reducing the amount of cache memory and reducing operating frequencies. These are two simple changes, but very important both in terms of performance and consumption, as well as in terms of occupied space at the silicon level.

Consider that the space taken up by the L3 cache is so large that to shape the Ryzen 7000X3D, AMD had to stack an additional 64MB of cache per chiplet, meaning that the mentioned cache occupies the same space as a chiplet with 8 cores and 32 MB L3 cache. In the case of the powerful Zen 4 cores used in this hybrid architecture, we could find a configuration between 8 MB and 16 MB of L3 cache, depending on the total number of activated cores.

Shrink the L3 cache it would affect the space occupied at the silicon level, which would be much less, but also the performance, especially in applications dependent on this type of memory, such as games. On the other hand, AMD could also reduce the operating frequencies, which would go from a maximum of 5 GHz for high-performance cores to Up to 4 GHz on high efficiency cores.

It goes without saying that the L3 cache reduction and the 1 GHz reduction would together allow the highly efficient Zen 4 core to offer performance similar to the Zen 2 core. Considering how well processors based on this architecture still perform, it is clear that these data are positive and that these highly efficient cores they could easily compete with their Intel equivalentsas those are more or less at Skylake level in terms of IPC.

Core layout: everything points to a monolithic design

At first it seems that AMD will use this hybrid architecture based on Zen 4 only in APUs, that is, in solutions that integrate CPU and GPU in the same package, and that both types of cores will be present in the same silicon chip, that is, splitting into multiple chips will not occur.

This leads us to talk about design monolithic core, and the first data we have points to two possible configurations, one that would have four high-performance cores and four high-efficiency cores, and another that would have two high-performance cores and four high-efficiency cores.

The first configuration should have 8 MB L3 cache on its high performance cores and 4 MB L3 cache on its high performance cores. The second configuration would retain the 4MB L3 cache on its high-performance cores and reduce the L3 cache on the high-performance cores to 4MB since it would only have two of those cores. In total it should have a 4 + 4 configuration 12 MB L3 cacheand the 2 + 4 configuration should 8 MB L3 cache.

Keep in mind that these dates are estimates and we don’t yet have confirmed exact amounts, which means these numbers may vary. However, given that the Ryzen 7 7840HS APU, based on Zen 4 and equipped with 8 high-performance cores, adds 16 MB of L3 cache I believe the values ​​I gave you they make a lot of sense.

In the performance test filtered under Cinebench R23, we could see that the high-performance cores reach 5 GHz, but on average they range stable between 4.2 and 4.3 GHz. High-performance cores reach 4 GHz, but their average remains a little below 3 GHz. As for consumption, the values ​​we have seen show between 7 and 8 watts in high performance dual cores and 5 watts in high performance quad cores. This leaves us with a total consumption of 13 watts.

Final Notes: Hybrid designs have great potential

AND They have been proving this for years in the mobile sector, where different architectures coexist and combine to create chips with up to three different core blocks. Intel realized this reality and decided to bet on it with Alder Lake-S, and the results were so good that they repeated it with Raptor Lake-S. AMD will be the next to jump on the bandwagon, although it looks like it will be doing so in a limited way for now, focusing on its APUs.

This new hybrid architecture based on Zen 4 will keep DDR5 memory supportcould have been made at the node TSMC 4nm, which would make it even more efficient, and will be complemented by a GPU based on the RDNA3 architecture. It could be released between the end of this year and the beginning of next year, and according to some rumors it could be the brains of Steam Deck 2.

We don’t know if AMD will eventually launch versions of these APUs for the PC sector or if they will be limited to notebooks and mobile devices only, but with the information we have now, I’d lean towards the latter. However, I believe that even if this limited adoption were to occur in both sectors, we would be facing a first step that would serve as a pioneer take this hybrid design to new levels in the coming years.