A few words about the quantum “accelerator”

Australian-German startup Quantum Brilliance is using NV centers in rhinestones to sell qubits. Such qubits are resistant to changes in the environment and you can interact with them in many different ways.

But so far, Quantum Brilliance offers rack systems with up to five qubits, which are pretty modest today and only expect to build a 50-qubit quantum accelerator in the form factor of PCIe cards by 2025.

But this is the first HPC platform of its kind to combine a traditional supercomputer and a “room” quantum computer.

Supercomputer and “room” quantum “accelerator”: watch the video

What tasks will the tandem perform?

The setup will be used for:

• demonstrating and testing hybrid quantum and classical computations,
• Finding the most appropriate approaches to software development for hybrid systems and creating new algorithms,
• and as well as describing all the nuances of such a tandem work.

Ideally, the process of transferring tasks to a quantum computer should be as simple as, say, a GPU.

As a result, the authors of the joint project hope to democratize quantum computing by making it flexible, easy to use, and truly usable for mass use not only in specialized data centers, but also in enterprises, data centers, transportation, and even mobile devices.

Meanwhile, IMEC announced the development of a 0.7 nanometer process. Such processors, of course, will not appear tomorrow, or even next year. The Intercollegiate Center for Microelectronics, an international research organization working in the field of nanoelectronics and digital technologies, has published a plan for the field of microelectronics for the next 15 years. It covers the feasibility study and design strategy for next-generation chips.

The center wants to standardize progress in chip design. If manufacturers adopt the new rules, the development and assembly of chips will be greatly simplified for all participants in the supply chain, including end device manufacturers.